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Data is the core of intelligent management. Intelligent management, scheduling, mining, and analysis of data help applications deliver personalized experience and companies implement precision control over the design, production and logistics process to reduce management costs. Data is defining new business models and creating new commercial opportunities.
The digital and intelligent transformation demands high-performance infrastructures, of which all-flash storage is an essential part. Born with high performance, all-flash storage is the new engine for mission-critical services. By vertically integrating its capabilities in chips, networks, and management, Huawei released the OceanStor Dorado all-flash storage series, which adopts an intelligent SSD controller chip, intelligent multi-protocol processing chip, and intelligent BMC management chip to build an end-to-end service acceleration platform, delivering triple performance and maximizing resource utilization.
Intelligent SSD controller chip, accelerating data read and write
Since data is stored on SSDs, the performance and stability of SSDs are critical. An SSD comprises of a control unit (SSD controller + DRAM) and a NAND flash storage unit. The control unit is responsible for data read/write. The Flash Translation Layer (FTL) is used to store the mapping between the user LBA and the physical page in the SSD. When the storage controller reads data from the SSD, it provides an LBA address. The control software in the SSD flash finds the physical address corresponding to the LBA address, reads the data from the flash, and returns the data to the host. In the case of writing, the control software writes data and then updates the FTL mapping table. Therefore, the FTL is the core of the entire SSD, and it determines the response time of data read/write.
To achieve the ultimate in storage speed, Huawei leverages an innovative SSD controller chip to accelerate data read and write. The FTL algorithm is moved from the control software layer to the SSD controller chip, so that all FTL reads and writes are performed by the chip, significantly reducing the number of software interactions and hence the I/O response latency. An example can help you better understand the reason. A computer using Windows 95 needs to load a long string of codes after being powered on, which takes two to three minutes. After switching to Windows 2010, the computer has a stronger CPU to load the codes. We can enter the startup interface instantaneously. According to tests by Huawei’s performance and interoperability lab, the read latency of Huawei SSDs is as low as 80 μs in low-load scenarios, which is only 60% of the same type of SSDs in the industry; the performance is two times higher than that of competitors.
However, that’s not all of it. To achieve end-to-end acceleration, Huawei developed the FlashLinkTM technology by combining proprietary SSD controller chip, SSDs, NVMe architecture, and a storage operating system designed for flash from the ground up. Huawei’s Dorado storage can deliver 3x higher performance after enabling of value-added features such as deduplication, compression, and snapshot, while maintaining 0.5 ms latency, eliminating performance shortage issues in peak hours.
Based on the flash-oriented storage operating system, Huawei Storage has developed an innovative disk-controller collaboration algorithm. As is known to all, garbage collection is one of the main factors that affects the performance of SSDs. The innovative disk-controller collaboration algorithm enables a storage controller to learn about the data layout in SSDs in real time and adjust the data layout to ensure consistent data layout between the storage controller and SSDs. Data in the controller is written into SSDs in the format required by the SSDs, avoiding subsequent data migration and garbage collection and ensuring consistently high performance of the flash storage system. This is the basic principle of the disk-controller collaboration algorithm. The detailed technologies involved include the sequential write of large blocks, independent partitioning of metadata, and end-to-end I/O priority adjustment. More details on these technologies will be introduced in later issues.
Based on the intelligent SSD controller chip and FlashLinkTM technology, Huawei’s lightning-fast and rock-solid OceanStor Dorado all-flash storage can deliver high performance while keeping the response time within 0.5 ms.
Intelligent multi-protocol interface chip, accelerating data read and write of front-end network interfaces
Front-end interface modules are essential to a storage system. Application data is transmitted from servers to storage arrays through these modules. Currently, mainstream front-end interface modules include 8G/16G/32G FC, 1/10/25/40/100 GE, and 10G FCoE. Each front-end interface module supports only one protocol, which is a kind of waste of resources. To improve the efficiency, Huawei develops a multi-protocol interface chip that integrates GE/10GE/FC/FCoE protocol interfaces. Customers can use one interface chip to transmit data carried over IP and FC protocols. On a 10GE or 8/16G FC network, only optical module components need to be replaced, instead of the entire module. The flexible conversion between protocols greatly improves network flexibility and reduces the network construction and maintenance costs of data centers.
More importantly, the internal hardware logic module of the intelligent multi-protocol interface chip supports many protocol stack functions such as checksum and FC. The processing flow, logic, and functions are switched over from the CPU software to the chip, helping ensuring high I/O concurrences and low latency of storage services. In other words, the intelligent multi-protocol interface chip offloads the checksum and FC workloads from the CPU, which can improve network processing performance, release the x86 CPU processor resources, accelerate network access and data exchange, and improve the overall storage performance. Huawei’s performance tests show that when configured with the same front-end interface module (16G FC) and test model (7:3 read/write, 8K I/O blocks), OceanStor Dorado can deliver 3x performance over competitors’ products.
Finally, let’s look at the FCoE protocol. It supports both FC and Ethernet-based transmission, thereby protecting FC-based software and hardware investments. The intelligent multi-protocol interface chip integrates the functions of the Ethernet NIC and FC network HBA card, that is, one interface can support two types of network I/Os, eliminating extra cables and switches and simplifying network management. Previously, the FCoE protocol runs on the host CPU, which consumes a large number of CPU resources. The host CPU cannot parse other network protocols at the same time, failing to provide the required high performance. OceanStor Dorado adopts the intelligent multi-protocol interface chip to process and parse the FCoE protocol, offloading the host CPU and improving the overall network performance and server availability.
Traditional networking FCoE (I/O consolidation)
Intelligent BMC management chip, accelerating fault management and rectification
Whether faults can be quickly identified and eliminated is a core indicator of the reliability of IT devices. The intelligent BMC management chip is the ”heart” of OceanStor Dorado. It is built in with fault diagnosis and fault prewarning libraries to improve fault diagnosis accuracy. Fast diagnosis is the prerequisite for fast recovery. The intelligent management chip provides a management computing capability of 2000 Dhrystone Millions Of Instructions Per Second (DMIPS), which is five times higher than that of competitors. If a controller, front-end interface module, or management module fails, the switchover can be performed in seconds. No data is lost, services are not interrupted, and users are completely unaware of the switchover.
The intelligent BMC management chip excels in energy saving. It monitors the health, power consumption, and temperature of each module in a refined manner, and combines the static and dynamic power consumption control technologies to adjust the heat dissipation of the system and reduce the chip temperature, thereby controlling static power consumption of the chip. On the other hand, the embedded dynamic energy management technology (DEMT) enables the chip to monitor and analyze the status of applications on the system, identifies and disables the clock and voltage of idle modules, to reduce the dynamic power consumption of the chip. According to field tests, under the same CPU workload, the power efficiency ratio of the entire system can be improved by 16%, and power consumption is obviously reduced.
whether for new applications such as artificial intelligence, Big Data, autonomous driving, and block chain, or traditional healthcare, manufacturing, and finance industries, innovative chip technologies have become the main driving force of enterprises. Huawei Storage continuously invests in innovation of chips and technologies to help enterprises cope with digital flood and accelerate digital transformation. The intelligent SSD controller chip introduces optimizations purpose-built for the flash media, exploring the full potential of flash to improve user experience. The multi-protocol intelligent processing chip simplifies networking, reduces management costs, and offloads network protocols to accelerate data read/write. The intelligent BMC management chip accelerates fault locating, implements failover in seconds, and excels in energy saving, helping users leasing IT devices to reduce costs and explore new business opportunities.
Through technological innovation and vertical optimizations of software, hardware, and chips, Huawei Storage is committed to eliminating the gap caused by unbalanced CPU, media, and network development, providing faster, better, and more cost-effective products and solutions. Explore more about Huawei Storage, and win business success together with Huawei.