Purpose-Built Silicon for All-Flash Storage
Data is the core of intelligent management, and the intelligent scheduling, mining, and analysis of applications data helps companies design, produce, and organize the logistics required to precisely control the delivery of personalized experiences to end users. In addition to reducing management costs, the effective use of data unlocks the ability to define new business models and create new commercial opportunities.
Digital transformations rely on intelligent management and demand high-performance infrastructures for which all-flash storage solutions are an essential part. All-flash storage products are the new engine for mission-critical services, and the core of commercial competitiveness.
Huawei created the OceanStor Dorado all-flash storage series by vertically integrating chips, networks, and management. The Dorado platform incorporates an intelligent SSD controller chip, intelligent multi-protocol processing chip, and intelligent Baseboard Management Controller (BMC) management chip to build an end-to-end service acceleration platform. The result delivers triple the performance and maximum resource utilization.
The essential SSD components for assuring critical data performance and stability include a control unit (SSD controller + DRAM) and a NAND flash storage unit that is responsible for data read/writes. The Flash Translation Layer (FTL) stores the mapping information between the user Logical Block Addressing (LBA) and the physical page in the SSD. In action, when the storage controller reads data from the SSD it records an LBA address. The FTL is the core of the entire SSD and it determines the response time to read and write data. The SSD flash control software finds the physical address corresponding to the LBA address, reads the data from the flash memory block, and returns the data to the host. When the control software writes data the FTL mapping table is updated.
Huawei is leveraging an innovative SSD controller chip to achieve the fastest read and write speeds. The FTL algorithm has been moved from the control software layer directly onto the SSD controller, therefore I/O latency is reduced because all FTL reads and writes are performed on-chip instead of as software interactions.
An example from history to better understand how all-flash storage affects day-to-day work: A Windows 95 computer would take two to three minutes to load a long string of boot code when powered on. A newer Windows 10-equipped machine, with a more powerful processor, is able to reach of the startup interface almost instantaneously after loading its boot code.
According to tests by Huawei’s performance and interoperability lab, the read latency of Huawei SSDs is as low as 80 μs in low-load scenarios — as little as 60 percent of the time for comparable SSDs on the market.
Huawei developed FlashLinkTM technology to achieve end-to-end acceleration. By combining a proprietary SSD controller chip, SSDs, NVMe architecture, and a storage operating system designed for flash, the OceanStor Dorado series of storage platforms delivers three times higher performance. A 0.5 ms latency is maintained, even during peak hours, when value-added features such as de-duplication, compression, and snapshot are enabled on Huawei all-flash storage products.
Based on the flash-oriented operating system, Huawei storage engineers have developed an innovative disk-controller-collaboration algorithm. It is well known that garbage collection is a key factor affecting SSD performance. The new algorithm enables the storage controller to recognize the data layout of SSDs in real time and adjust the layout to ensure consistency between the storage controller and SSDs.
Controller data is written into SSDs that are formatted as required at that moment, per that session, by the SSDs. Proper formatting avoids additional data migration and garbage collection cycles that ensure consistently high flash-system performance. Sequential writing of large blocks, independent partitioning of metadata, and end-to-end I/O priority adjustment all help to fulfill the basic principles of the disk-controller collaboration algorithm.
Based on the intelligent SSD controller chip and FlashLinkTM technology, Huawei’s lightning-fast and rock-solid OceanStor Dorado all-flash storage can deliver high performance and keep the response time to within 0.5 ms.
Front-end interface modules are a key subsystem because the application data is transmitted through these modules from servers to storage arrays. Currently, mainstream front-end interface modules include 8G/16G/32G Fiber Channel (FC), 1 GE/10 GE/25 GE/40 GE/100 GE, and 10G Fiber Channel over Ethernet (FCoE). The current industry standard for each front-end interface module is to support only one of the protocols listed above, which Huawei believes is a waste of resources.
To improve upon this inefficiency, Huawei has developed a multi-protocol interface chip that integrates GE/10 GE/FC/FCoE interfaces into one device. Customers are able to use the same interface chip to transmit data for both IP and FC protocols. On a 10 GE or 8G/16G FC network, only optical module components will need to be replaced instead of the entire module. The ability to convert between protocols greatly improves network flexibility and reduces the network construction and maintenance costs for data centers.
Also important is the support for many protocol stack functions such as checksum and FC in the internal hardware logic module of the intelligent multi-protocol interface chip. The processing flow, logic, and other task-specific functions are now switched from the CPU software to the chip to ensure high I/O concurrency and low latency storage services. In other words, the interface chip offloads the checksum and FC workloads from the CPU to improve network processing performance, access, and data exchange; release x86 CPU resources; and improve overall storage performance. Huawei’s performance tests show that when configured with the same front-end interface module (16G FC) and test model (7:3 read/write, 8K I/O blocks), OceanStor Dorado solutions deliver up to three times the performance of competitors’ products.
Software and hardware investments are protected by the support of FCoE protocols for both FC and Ethernet-based transmission. The intelligent Huawei multi-protocol interface chip integrates the functions of the Ethernet Network Interface Card (NIC) and FC-network Host Bus Adapter (HBA) card; that is, one interface is supporting two types of network I/Os. This eliminates extra cables and switches, and simplifies network management. Previously, the FCoE protocol would consume a significant portion of host CPU resources. And, because the CPU could not parse multiple network protocols simultaneously, the required performance levels could not be achieved. OceanStor Dorado products use the multi-protocol interface chip to process the FCoE protocol by offloading the workload from the host CPU, which improves overall network performance and server availability.
The quick identification and elimination of data faults is a core indicator of IT device reliability, and the intelligent BMC management chip is the ‘heart’ of the OceanStor Dorado. It has built-in fault diagnosis and pre-warning libraries to improve diagnostic accuracy, as fast diagnosis is a singular prerequisite for immediate recovery. The intelligent management chip is benchmarked at 2,000 Dhrystone Millions of Instructions Per Second (DMIPS), a figure that is five times higher than that of Huawei’s competitors. If a controller, front-end interface module, or management module fails, switchovers are performed within seconds — so fast that no data is lost, services are not interrupted, and users are completely unaware of the switchover.
The intelligent BMC management chip excels in saving energy. By monitoring the health, power consumption, and temperature of each module in detailed log files, static and dynamic power consumption control technologies are combined to adjust the heat dissipation of the system. Static power consumption is controlled by reducing the temperature of the chip. Additionally, the embedded Dynamic Energy Management Technology (DEMT) enables the chip to analyze the status of applications on the system, disable the clock, and reduce the voltage of idle modules to reduce the chip’s dynamic power consumption. According to field tests, under the identical CPU workloads, the power efficiency ratio of Huawei’s entire flash-storage system can be improved by 16 percent.
Whether for new applications — such as artificial intelligence, Big Data, autonomous driving, or block chain — or traditional applications such as healthcare, manufacturing, or finance — innovative chip technologies are a primary force for global enterprise growth. The Huawei Storage group is committed to the continuous investment in chip innovation to help enterprises accelerate their digital transformation to better cope with today’s digital deluge.
The intelligent SSD controller chip introduces purpose-built optimizations for flash media to capitalize on the full potential to improve user experience. The multi-protocol intelligent processing chip simplifies networking, reduces management costs, and offloads network protocols to accelerate data reads and writes. The intelligent BMC management chip accelerates fault location, failover in seconds, and superior energy efficiency. Combined, the three custom all-flash storage chips help the users who lease IT devices to reduce costs and while simultaneously exploring new business opportunities.
Through technical innovation and vertical optimizations at the software, hardware, and chip levels the Huawei Storage group is committed to eliminating the performance gaps caused by the unbalanced development of CPU, media, and network technologies. In doing this, Huawei Storage is providing faster, better, and more cost-effective products and solutions. We invite you to learn more about Huawei Storage to better understand how your business can succeed with Huawei.